CVE-2020-24512
- State
- Published
- Severity
- Not scored
- Published
- Jun 9, 2021
- Updated
- Oct 8, 2026
- Reserved
- Aug 19, 2020
Description
Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
Scores
The record has no CVSS score.
Weaknesses
The record names no weakness.
Affected Products
| Product | Versions |
|---|---|
Intel(R) Processorsn/a |
|
References
- https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00464.html
- https://security.netapp.com/advisory/ntap-20210611-0005/
- DSA-4934vendor-advisory
- [debian-lts-announce] 20210726 [SECURITY] [DLA 2718-1] intel-microcode security updatemailing-list
- https://cert-portal.siemens.com/productcert/pdf/ssa-309571.pdf
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