CVE-2024-24853
- State
- Published
- Severity
- 7.3 High
- Published
- Aug 14, 2024
- Updated
- Aug 16, 2024
- Reserved
- Feb 8, 2024
Description
Incorrect behavior order in transition between executive monitor and SMI transfer monitor (STM) in some Intel(R) Processor may allow a privileged user to potentially enable escalation of privilege via local access.
Scores
| CVSS | Score | Vector | Source |
|---|---|---|---|
| 4.0 | 7.3 High | CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:P/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H | intel |
| 3.1 | 7.2 High | CVSS:3.1/AV:L/AC:H/PR:H/UI:R/S:C/C:H/I:H/A:H | intel |
Weaknesses
- CWE-696 Incorrect behavior order
Affected Products
| Product | Versions |
|---|---|
Intel(R) Processorn/a |
|
References
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