CVE-2024-30212
Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command
- State
- Published
- Severity
- 7.0 High
- Published
- May 28, 2024
- Updated
- Feb 13, 2025
- Reserved
- Mar 26, 2024
Description
If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1,
the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed.
The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to
return data from any other offset including Progam and Boot Flash.
Scores
| CVSS | Score | Vector | Source |
|---|---|---|---|
| 4.0 | 7.0 High | CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N | Microchip |
Weaknesses
- CWE-190 Integer Overflow or Wraparound
Affected Products
| Product | Versions |
|---|---|
MPLAB® Harmony 3 Core ModuleMicrochip |
|
References
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